Timed commands let you instruct a USRP to execute an action—start streaming, change frequency, adjust gain, switch antenna—at a specific future time rather than immediately. Because the timing is enforced by the FPGA, the latency jitter is bounded by the device’s master clock period rather than by host OS scheduling. This makes timed commands essential for frequency hopping, coordinated multi-channel starts, and protocol-level TX/RX switching. There are two distinct flavors of timed commands in UHD: stream commands (which control when samples flow) and general timed commands (which schedule RF configuration changes).Documentation Index
Fetch the complete documentation index at: https://mintlify.com/EttusResearch/uhd/llms.txt
Use this file to discover all available pages before exploring further.
Stream Commands with Timestamps
- Timed RX Start
- Timed TX Burst
Attach a
time_spec to a stream command to start capturing samples at a precise moment. Set stream_now = false to arm the timed start:The metadata object returned by
recv() will carry a time_spec matching the requested start time. Use it to verify the alignment was honored.General Timed Commands
Unlike stream commands, general timed commands schedule RF configuration changes: gain, frequency, antenna, and GPIO. Callset_command_time() before the commands you want deferred, then call clear_command_time() immediately after to ensure subsequent commands execute normally.
API Reference
| Function | Signature | Description |
|---|---|---|
set_command_time | set_command_time(const uhd::time_spec_t& time_spec, size_t mboard = ALL_MBOARDS) | Queue subsequent commands for execution at time_spec |
clear_command_time | clear_command_time(size_t mboard = ALL_MBOARDS) | Return to immediate execution mode |
get_time_now | get_time_now(size_t mboard = 0) | Read the current device time |
Supported Commands
The set of commands that can be timed depends on the underlying device and, for RFNoC devices, on the specific RFNoC block receiving the command. Typical commands that support timed execution include:RF configuration commands
RF configuration commands
set_rx_freq()— retune RX center frequencyset_tx_freq()— retune TX center frequencyset_rx_gain()— adjust RX gainset_tx_gain()— adjust TX gainset_rx_antenna()— switch RX antenna portset_tx_antenna()— switch TX antenna port
GPIO commands
GPIO commands
Toggling GPIO lines on a precise schedule is supported for devices that expose GPIO through the RFNoC command path. This enables bit-banging serial protocols or hardware trigger generation with sub-microsecond timing precision.
Refer to each device’s manual page to confirm which commands are timed on that platform. Commands unsupported for timed operation on a given device may be executed immediately regardless of the command time setting.
Command Queues
Every command destined for the USRP is placed into a hardware command queue in the FPGA. Key behaviors to understand:- Serial execution: Commands are always executed in the order they arrive, never reordered.
- Late commands execute immediately: If the command time is already in the past when the FPGA processes the command, it executes as soon as it is dequeued.
- No reordering: If you submit a command for
t=10 sand then one fort=5 s, the second command will still run after the first—it will not be re-sorted. - Back-pressure: When the queue is full, UHD blocks until the FPGA signals available space. If this happens close to the desired command time, the command may arrive late.
Command Time Resolution
Command times are stored asuhd::time_spec_t but converted to a 64-bit tick count before being sent to the FPGA. The resolution is therefore limited to one tick of the device’s master clock:
| Device | Master Clock Rate | Timing Resolution |
|---|---|---|
| X310 | 200 MHz | 5 ns |
| X410 | 250 MHz | 4 ns |
| X440 | 500 MHz (internal: 62.5 MHz) | 16 ns effective |
2.000000001 s would be rounded to exactly 2.000000000 s.
The X440 operates at 500 MHz externally but processes commands on a 62.5 MHz internal clock (8 samples per clock edge), giving an effective timing granularity of 16 ns regardless of the nominal clock rate.
