Board features
PCIe x1
Full-size PCIe x1 slot. Enable with
dtparam=pciex1=on in config.txt. Used for the Axelera Metis M.2 AI accelerator or other PCIe peripherals.SATA
SATA port via ASM1061 bridge. Enumerates as
/dev/sdX after boot. Suitable for HDD or SSD storage expansion.M.2 slot
M.2 Key M slot connected to the PCIe bus. Supports NVMe SSDs and the Axelera Metis AI accelerator module.
UART debug header
Exposes
ttyAMA0 at 115200 baud. Keep console=ttyAMA0,115200 in the kernel command line during bring-up.Network
Onboard Ethernet interface. The dracut
network module enables DHCP in the initramfs for headless rescue via Dropbear.IoT header
General-purpose IoT connector. Exposed as the
/dev/cruiser-iot symlink via udev.Device node symlinks
After a successful boot, udev creates three symlinks that preflight checks rely on:| Symlink | Target | Purpose |
|---|---|---|
/dev/gps0 | GPS/GNSS receiver node | Position/timing hardware |
/dev/axelera0 | Axelera Metis PCIe device | AI accelerator access |
/dev/cruiser-iot | IoT connector device | General IoT peripheral |
D-Bus policy for org.exaviz.hardware
The Cruiser’s hardware daemon communicates over D-Bus using the well-known name org.exaviz.hardware. The policy file /etc/dbus-1/system.d/exaviz.hardware.conf controls access:
exaviz.hardware.conf
Only
root may own the org.exaviz.hardware name. All other users may introspect properties and receive signals, but cannot own the name or call arbitrary methods.Running preflight
preflight.sh confirms that memory, the Axelera PCIe link, and all three udev symlinks are present before starting dependent services.
preflight.sh
Systemd units
rpi-hw-rebuild.service
Rebuilds the combined device-tree blob, regenerates the dracut initramfs, and updates GRUB whenever hardware overlays change. It is triggered automatically by rpi-hw-update.path.
rpi-hw-rebuild.service
rpi-hw-update.path
Watches /lib/firmware/overlays/ for new or changed overlay files and activates rpi-hw-rebuild.service.
rpi-hw-update.path
Compiling device tree overlays
To compile a.dts source file into a .dtbo overlay binary, install the device tree compiler and use the Makefile.in in the repository root:
Post-boot checklist
The following notes are embedded in the image at/etc/qemu-archstrap/cm5-exaviz-notes.txt by cm5-setup.sh. They cover the most common tasks after first boot on an Exaviz Cruiser.
PCIe and SATA
PCIe and SATA
Enable PCIe by adding
dtparam=pciex1=on to /boot/efi/config.txt. The SATA port is connected via an ASM1061 bridge and enumerates as /dev/sdX automatically once PCIe is active.Snapshot replication to a SATA disk:NVMe (CM5 M.2)
NVMe (CM5 M.2)
Enable NVMe by uncommenting This mirrors the eMMC and NVMe into a RAID 1 btrfs pool.
dtparam=nvme=on in /boot/efi/config.txt. After boot, add the NVMe device to the btrfs pool:UART console
UART console
ttyAMA0 at 115200 baud is exposed on the Exaviz Cruiser debug header. Always include console=ttyAMA0,115200 in the kernel command line during hardware bring-up.Early SSH via Dropbear
Early SSH via Dropbear
The dracut initramfs includes Dropbear for pre-mount rescue access:Useful for LUKS unlock, btrfs repair, and pre-mount diagnostics. Requires
authorized_keys to be injected during image build.UEFI firmware updates
UEFI firmware updates
RPI_EFI.fd, download the latest release from worproject/rpi5-uefi and replace the file on the ESP manually.