Overview
The Vivado backend enables deployment of neural networks on AMD/Xilinx FPGAs using the Vivado HLS compiler. It generates High-Level Synthesis (HLS) IP cores that can be integrated into Vivado designs.When to Use Vivado Backend
- Working with legacy projects using Vivado HLS
- Targeting older AMD/Xilinx FPGA development flows
- Maintaining existing Vivado HLS-based designs
New hls4ml developments may not be backported to the Vivado backend. Consider migrating to Vitis for access to latest features.
Installation and Setup
Prerequisites
- Vivado HLS installation (ensure
vivado_hlsis on PATH) - AMD/Xilinx FPGA development tools
- Python 3.8 or higher
- hls4ml library installed
Environment Setup
Configuration
Basic Configuration
Create a model configuration for the Vivado backend:Configuration Options
The Vivado backend supports the following configuration parameters:FPGA part number to target
Clock period in nanoseconds
Clock uncertainty percentage for timing analysis
I/O implementation type:
io_parallel: Processes all inputs/outputs simultaneouslyio_stream: Streams data through the design
Optional C++ namespace for generated code
Write weights to .txt files for faster compilation
Compress output directory into .tar.gz file
Layer-Specific Configuration
Strategy Selection
Vivado backend supports multiple implementation strategies:- Latency: Fully unrolled implementation (low latency, high resource usage)
- Resource: Serialized implementation with configurable reuse factor
- Resource_Unrolled: Combination of resource sharing with partial unrolling
- Distributed_Arithmetic: Uses lookup tables for dense layers (must have
ReuseFactor=1)
Convolution Layers
RNN Layers
Build Process
Synthesis Commands
Build Options
Detailed Build Options
Detailed Build Options
| Option | Description | Default |
|---|---|---|
reset | Reset project before building | False |
csim | Run C simulation testbench | True |
synth | Run HLS synthesis | True |
cosim | Run RTL co-simulation | False |
validation | Run validation tests | False |
export | Export as IP for Vivado | False |
vsynth | Run Vivado synthesis | False |
fifo_opt | Optimize FIFO depths | False |
TCL Script Execution
The build process generates and executes abuild_prj.tcl script:
Example Project Structure
After conversion, the project structure looks like:Performance Optimization
Reuse Factor Tuning
The reuse factor controls resource/latency tradeoff:Precision Configuration
Pipeline Optimization
For streaming designs:Performance Characteristics
Resource Usage
- LUTs: Depends on precision, strategy, and reuse factor
- DSPs: Used for multiplications (resource strategy shares DSPs)
- BRAM: Stores weights and intermediate data
- FFs: Flip-flops for pipelining
Latency Considerations
io_parallel:- Latency = Sum of layer latencies
- Initiation interval (II) = Total latency for pipelined designs
- Pipelined dataflow between layers
- Throughput limited by slowest layer
- Lower latency for streaming applications
Clock Frequency
Typical achievable frequencies:- Conservative: 100-150 MHz (clock_period=10-6.67ns)
- Moderate: 150-200 MHz (clock_period=6.67-5ns)
- Aggressive: 200-250 MHz (clock_period=5-4ns)
Advanced Features
Distributed Arithmetic
For dense layers, enable distributed arithmetic implementation:Quantization-Aware Training
Integrate with QKeras for quantization:Custom Layers
Implement custom layer templates:Troubleshooting
Vivado HLS not found
Vivado HLS not found
Ensure Or source the settings script:
vivado_hls is in your PATH:Timing not met
Timing not met
- Increase clock period
- Increase reuse factors
- Reduce precision
- Enable pipelining pragmas
- Use lower clock uncertainty
Resource usage too high
Resource usage too high
- Increase reuse factors
- Use Resource strategy instead of Latency
- Reduce precision
- Enable weight compression
- Use io_stream for large models
Compilation errors
Compilation errors
- Check that all layer types are supported
- Verify precision specifications are valid
- Ensure weight dimensions match layer configuration
- Check for unsupported activation functions
Migration to Vitis
To migrate from Vivado to Vitis backend:Most configurations are compatible, but review Vitis-specific validation passes and adjust as needed.
Related Resources
Vitis Backend
Modern alternative using Vitis HLS
Configuration Guide
Detailed configuration options
Optimization Tips
Performance tuning strategies
API Reference
Python API documentation
