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CodeFusion Studio provides a fully integrated debugging environment for Analog Devices microcontrollers and DSPs. Built on top of VS Code’s native Run and Debug view, it adds embedded-specific capabilities including SVD-based peripheral register inspection, RTOS thread awareness, multi-core session coordination, and post-mortem core dump analysis. This page covers everything from installing debug drivers and connecting hardware through to launching single-core and multi-core debug sessions and interpreting the debug interface.
Before connecting hardware, install the driver for your debug probe. Driver installation is required only once per machine.
Segger J-Link
Olimex (RISC-V)
ICE (SHARC-FX, Windows only)
Download and install the official Segger J-Link software package from the Segger website. After installation, the JLinkGDBServerCL executable must be accessible from your system PATH or configured in CFS settings.
J-Link Software and Documentation Pack V8.94 or later is required for MAX32657 and MAX32658 processor support. Earlier versions do not include official support for these devices.
On MAX32657 and MAX32658 EV kits, the on-board J-Link is enabled by default. To use an external J-Link instead, remove the shunt from JP6, connect the external probe to J3 (EXT SWD), and install shunts on JP22 and JP23 (EXT SWD EN). Remove all shunts from JP18 (OBD SWD EN). Always verify the target I/O voltage (typically 1.2–1.6 V for current EV kit revisions) before connecting an external debugger.
The Olimex ARM-USB-OCD-H adapter requires the libusb-based WinUSB driver on Windows. On macOS and Linux the driver is typically included with the OS. Connect the adapter to the RISC-V JTAG header on the board (for example, JH5 on MAX78002EVKIT) using the ARM-JTAG-20-10 converter ribbon cable.
ICE emulator drivers for SHARC-FX targets are distributed as part of the CodeFusion Studio installer. If you selected ADI ICE Drivers (Requires Administrator) during installation, no additional steps are needed. If you skipped this option, install the ICE drivers manually from the CFS documentation. After installation, verify the emulator appears under CrossCore Tools in Windows Device Manager.
Physical connections vary by board and debug probe. The general pattern is:
1
Install drivers
Confirm the appropriate debug probe driver is installed for your target (see above).
2
Connect the debug probe to the board
Use the correct cable and header for your board and debugger:
SWD (Arm Cortex-M): 10-pin ribbon cable to the SWD header (for example, J3 on MAX32690EVKIT, JH8 on MAX78002EVKIT).
RISC-V JTAG: Olimex adapter with ARM-JTAG-20-10 converter to the RV JTAG header (for example, JH5 on MAX78002EVKIT).
SHARC-FX JTAG: ICE emulator ribbon cable to the JTAG header (for example, P6 on ADSP-SC835W board).
3
Connect the UART cable
For serial console output, connect a USB cable to the board’s UART port (for example, CN2 on MAX32690EVKIT or MAX78002EVKIT, J1 on MAX32657EVKIT). Identify the serial port using Device Manager on Windows (COM*), ls /dev/tty.* on macOS, or ls /dev/ttyUSB* /dev/ttyACM* on Linux.
4
Power the board
Connect the power source as required by your board. Some boards are USB-powered; others (such as MAX78002EVKIT) require an external 5 V supply. Flip the power switch to ON.
5
Connect debugger to computer
Plug the debug probe into your computer via USB. For J-Link probes, verify the LED indicator is illuminated. For ICE emulators, verify the LED flashes green.
If you are unsure which serial port corresponds to your board, disconnect the UART cable and note which port disappears from the list, then reconnect.
CFS automatically generates a default debug configuration for each new workspace. In most cases, you can start debugging immediately.
1
Build the project
Run CFS: build (or Ctrl+Shift+B) to generate the ELF binary. Debugging requires a valid ELF file in the ./build directory.
2
Open Run and Debug
Click the Run and Debug icon in the Activity Bar (or press Ctrl+Shift+D / Cmd+Shift+D).
3
Select a debug configuration
Choose the configuration that matches your target and debugger from the dropdown:
CFS: Debug with GDB and OpenOCD (Arm Embedded) — for Cortex-M with OpenOCD
CFS: Debug with JlinkGDBServer and JLink (Arm Embedded) — for Cortex-M with J-Link
CFS: Debug with GDB and OpenOCD (RISC-V) — for RISC-V cores
4
Start debugging
Click the green Start Debugging play button to the left of the dropdown, or press F5. The debugger flashes the binary (if configured), connects to the target, and halts at main().
When using the CFS: Debug with GDB and OpenOCD (Arm Embedded) configuration, CFS automatically loads the appropriate SVD file from the CMSIS Pack directory for peripheral register inspection. For other targets, you may be prompted to select an SVD file manually.
Dual-core MAX32xxx and MAX78xxx devices use a single image that contains the secondary core’s binary embedded in the primary core’s output. The secondary RISC-V core is enabled after MXC_SYS_RISCVRun() is called on the Arm core.
1
Create a multi-core workspace
Use the Workspace Creation Wizard and select the MAX78002 processor with the MSDK multi-core template. The wizard configures both sub-projects.
2
Build the project
Run Build (m4) from the Actions view. This produces both build/m4.elf and build/buildrv/riscv.elf.
3
Start the Arm debug session
Select CFS: Debug with GDB and OpenOCD (Arm Embedded) and press F5. If prompted, specify the ELF path: <workspace>/m4/build/m4.elf. Let the session run until past the MXC_SYS_RISCVRun() call.
4
Confirm RISC-V is running
Observe LED0 blinking, or pause the Arm core and verify execution has passed MXC_SYS_RISCVRun().
5
Start the RISC-V debug session
Select CFS: Debug with GDB and OpenOCD (RISC-V) and press F5. If prompted, specify: <workspace>/m4/build/buildrv/riscv.elf.
6
Navigate between cores
Use the Call Stack panel to switch between Arm and RISC-V debug instances. Each instance maintains its own execution state, breakpoints, and register view.
On MAX32xxx/MAX78xxx evaluation boards, clicking Restart during a RISC-V debug session causes a Protocol error with Rcmd: FC. This is expected — the RISC-V JTAG port must be re-enabled by the Arm core via MXC_SYS_RISCVRun() before reconnecting.
The Variables panel shows local, global, and static variables scoped to the current stack frame. Double-click a value to edit it in place. The Watch panel evaluates arbitrary expressions and GDB expressions each time execution pauses.
Watch expressions are not context-aware across stack frames. An expression referencing a local variable from a different scope will fail to evaluate. Expressions that assign values (such as counter = 0) will execute that assignment each time the expression is re-evaluated on pause or step.
The Call Stack panel displays the full call chain with function names, PC addresses, and source information. Select any frame to inspect its local variables and registers. Right-click the active frame and choose Open Disassembly View to inspect machine-level instructions.
While the Disassembly view is focused, each step action advances by a single assembly instruction rather than a source line.
Line breakpoints — click the left margin next to a line number to set a standard breakpoint.
Conditional breakpoints — right-click an existing breakpoint, select Edit breakpoint → Expression, and enter a condition. Execution only pauses when the condition is true.
Inline breakpoints — place the cursor at the exact expression within a line and use Shift+F9 (Windows/Linux) or Cmd+F9 (macOS) to break mid-expression.
The XPeripherals view provides a nested tree of all memory-mapped peripheral registers and their individual bit fields, loaded automatically from the SVD file. Hover over any register or bit for documentation. Click to copy a value, or click to modify it.
Some register bits are reserved and not listed in the SVD. When writing to a full register value, ensure reserved bits remain zero.
When debugging a Zephyr RTOS application, the XRTOS tab displays all active thread names, states, and stack usage. Enable the following Kconfig flags in your prj.conf:
View UART output from the target using any serial terminal. The VS Code Serial Monitor extension provides a built-in terminal; third-party tools such as Tera Term, Minicom, or PuTTY are also supported (baud rate: 115200).
Arm CMSIS-DAP debuggers (including MAXPICO and MAX32xxxx on-board debuggers) use the serial Break signal to trigger a target reset. Microsoft’s Serial Monitor sends a Break before connecting, which resets the processor. Connect to the serial port before starting a debug session when using CMSIS-DAP probes, or use an external terminal such as Minicom or PuTTY.
SHARC-FX debugging is Windows only and requires the Xtensa toolchain and ICE emulator. ADSP-SC83x multicore SoCs require starting the SHARC-FX core debug session before attaching the ARM core.
1
Install ICE drivers and Xtensa toolchain
Ensure ICE drivers are installed. Log in with your myAnalog account and install xtensa_sharcfx_toolchain/15.5.0 via the Command Palette (CFS: Install Required Packages) or cfsutil pkg install xtensa_sharcfx_toolchain/15.5.0.
2
Connect the ICE emulator
Attach the ICE emulator USB cable to your computer, then connect the ribbon cable to P6 (JTAG header) on the board. Connect the board’s USB-C power/data cable to P1. Verify both LEDs flash green.
3
Configure the ICE model (if not ICE-2000)
If using ICE-1000 or ICE-1500, update .vscode/settings.json:
"cfs.openocd.interface": "interface/ice1000.cfg"
Also update the adapter speed in .vscode/launch.json (maximum 5000 for ICE-1000/ICE-1500):
"openOCDLaunchCommands": ["adapter speed 5000"]
4
Build and start the SHARC-FX debug session
Run Build (sfx) from the Actions view, then select Debug with GDB and OpenOCD (sfx) and press F5. The preload application runs and configures clocks. Click the Reset device icon to load the main application.
5
Start the ARM debug session (multicore only)
Once the SHARC-FX session is halted at main(), launch Debug with GDB and OpenOCD (ARM) as a second session.
To debug hardware connected to a remote machine, start a GDB server on the remote host and connect to it over the network from your local CFS environment.On the remote machine (J-Link example):
Use a firewall or VPN to restrict GDB server port access to trusted hosts. Remote debug access allows intrusive control of the target, including reading and writing memory.
If CFS cannot locate an SVD file in the CMSIS Pack directory, it displays an error notification with a Browse button. Use it to navigate to the .svd file for your device, or manually set the svdFile path in .vscode/launch.json.
J-Link not connecting: device already in use
Only one process can hold the J-Link probe at a time. If you see Connecting to J-Link failed, ensure no other J-Link tools (JLinkExe, another GDB server instance, Ozone) are running and accessing the probe.
Multiple J-Link devices detected (MAX32657/58)
MAX32657/58 EV kits have an on-board J-Link that conflicts with an external probe if both are active. Remove the shunt from JP6 to disable the on-board debugger and route SWD to J3 for the external probe. See the EV kit user guide for complete jumper settings.
Serial Monitor causes unexpected resets
The VS Code Serial Monitor sends a Break signal before opening the port, which resets Arm CMSIS-DAP targets. Connect to the serial port before launching the debug session, or switch to Tera Term, Minicom, or PuTTY.
SHARC-FX: GDB server quits unexpectedly
If OpenOCD exits immediately for SHARC-FX, the ICE emulator model in .vscode/settings.json may not match the connected hardware. Update cfs.openocd.interface to the correct model (ice1000.cfg, ice1500.cfg, or ice2000.cfg) and adjust adapter speed if using ICE-1000 or ICE-1500.
Failed to open serial port on Linux
Add your user to the dialout group and log out/log in again: