ProtoPulse’s AI assistant operates through a typed tool action system. When you describe a task in natural language, the AI selects one or more tools from the registry, constructs validated parameters, and executes the actions against your project. Tools that modify database state run server-side; tools that update the canvas or trigger UI interactions are dispatched to the client. Every tool call is schema-validated with Zod before execution — invalid parameters are rejected with a clear error message rather than silently ignored. The registry is organized into 11 modules. Expand any module below to see its tools.Documentation Index
Fetch the complete documentation index at: https://mintlify.com/wtyler2505/ProtoPulse/llms.txt
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Architecture — 10 tools
Architecture — 10 tools
The architecture module operates on the block diagram canvas. It manages component nodes, signal edges, hierarchical sheet organization, auto-layout, net naming, and pin assignments.
| Tool | Description | Key parameters |
|---|---|---|
add_node | Create a new component node on the block diagram. Executes server-side; writes to the architecture_nodes table. | nodeType (MCU, Sensor, Power, Communication, etc.), label, description, positionX, positionY |
remove_node | Delete a node and all of its edges. Destructive — requires confirmation. | nodeLabel |
update_node | Change the label, type, or description of an existing node. | nodeLabel, newLabel, newType, newDescription |
add_edge | Create a typed signal connection between two nodes. Supports bus metadata, signal types, voltage, and net names. | sourceLabel, targetLabel, edgeLabel, busType (SPI, I2C, UART, USB, Power, GPIO), signalType, voltage, busWidth, netName |
remove_edge | Delete a connection between two nodes. Destructive — requires confirmation. | sourceLabel, targetLabel |
generate_architecture | Generate a complete block diagram from scratch — nodes and edges in one operation. | components[] (label, nodeType, description, positionX, positionY), connections[] (sourceLabel, targetLabel, label, busType) |
auto_layout | Reorganize all nodes using a layout algorithm. Dispatched client-side. | layout: hierarchical | grid | circular | force |
manage_sheets | Create, rename, or move nodes between hierarchical schematic sheets. Covers create_sheet, rename_sheet, and move_to_sheet. | name (create), sheetId + newName (rename), nodeLabel + sheetId (move) |
assign_net_names | Assign a meaningful net name to an existing edge. | sourceLabel, targetLabel, netName |
set_pin_maps | Set or auto-assign pin-level connections for a component node. | nodeLabel, pins (record of pin name → net name); or nodeLabel for auto-assign |
Circuit — 12 tools
Circuit — 12 tools
The circuit module operates on schematic capture, breadboard layout, and PCB traces. It manages circuit designs (sheets), placed component instances, electrical nets, wire segments, ERC, and PCB routing.
| Tool | Description | Key parameters |
|---|---|---|
create_circuit | Create a new circuit design (schematic sheet). | name, description |
place_instance | Place a component instance on the schematic from the component library. | circuitId, referenceDesignator, partId, positionX, positionY |
remove_instance | Remove a placed component instance. Destructive — requires confirmation. | circuitId, instanceId |
draw_net | Draw an electrical net connecting two component pins. | circuitId, name, netType (signal, power, ground) |
remove_net | Delete a net and its associated wire segments. Destructive — requires confirmation. | circuitId, netId |
place_power_symbol | Place a power symbol (VCC, GND, +3V3, etc.) on the schematic. | circuitId, symbol, positionX, positionY |
place_no_connect | Place a no-connect marker on an unconnected pin to suppress ERC warnings. | circuitId, instanceId, pinName, positionX, positionY |
place_net_label | Place a net label to create named connections across the schematic without drawing a wire. | circuitId, netName, positionX, positionY |
run_erc | Run Electrical Rules Check on a circuit design. Reports unconnected pins, shorted outputs, and conflicting drivers. | circuitId |
place_breadboard_wire | Place a wire segment in the breadboard layout view. | circuitId, fromRow, fromCol, toRow, toCol, color |
draw_pcb_trace | Draw a routed trace on a PCB layer. | circuitId, netId, layer (F.Cu, B.Cu), width, waypoints array |
auto_route | Trigger automatic trace routing for all unrouted connections on a circuit. | circuitId, strategy |
BOM — 10 tools
BOM — 10 tools
The BOM module manages the project’s Bill of Materials. It handles CRUD operations on line items, real-time pricing lookups, alternative part suggestions, BOM-level cost optimization, parametric component search, datasheet links, and component comparison.
| Tool | Description | Key parameters |
|---|---|---|
add_bom_item | Add a component to the BOM. Executes server-side; writes to the bom_items table. | partNumber, manufacturer, description, quantity, unitPrice, supplier, status |
remove_bom_item | Remove a BOM item by part number. Destructive — requires confirmation. | partNumber |
update_bom_item | Update one or more fields on an existing BOM item. | partNumber, updates (record of field → new value) |
export_bom_csv | Generate and download a BOM CSV file. Supports generic, JLCPCB, Mouser, and DigiKey formats. | format: generic | jlcpcb | mouser | digikey |
lookup_pricing | Look up real-time pricing and availability for a part number across distributors. | partNumber |
suggest_alternatives | Find equivalent or alternative parts for a given part number — useful when a component is out of stock or too expensive. | partNumber, reason (cost, availability, performance) |
optimize_bom | Analyze the full BOM and identify cost reduction opportunities: volume pricing, cheaper equivalents, consolidation opportunities. | (no required parameters) |
parametric_search | Search for components by category and parametric specifications (e.g., “capacitor, 100nF, 50V, 0402”). | category, specs (record of spec name → value) |
add_datasheet | Attach a datasheet URL to a BOM item. | partNumber, url |
compare_components | Fetch BOM and architecture data and structure it for a side-by-side component comparison. | (no required parameters; AI formats the comparison table) |
Validation — 9 tools
Validation — 9 tools
The validation module runs design rule checks, electrical rules checks, and specialized analyses. It can add custom findings, auto-fix common issues, check design-for-manufacturing constraints, and generate structured test plans.
| Tool | Description | Key parameters |
|---|---|---|
run_drc | Trigger a full Design Rule Check on the current project. Populates the Validation panel with findings categorized as error, warning, or info. | (no required parameters) |
add_issue | Add a specific validation finding manually. Executes server-side; writes to validation_issues. | severity (error, warning, info), message, componentId, suggestion |
clear_issues | Clear all validation issues from the project. Destructive — requires confirmation. | (no required parameters) |
power_budget_analysis | Calculate the total power budget across all power rails. Flags components that may exceed rail capacity. | (no required parameters) |
voltage_domain_check | Verify that voltage levels are compatible across all connections — catches logic-level mismatches (e.g., 5V signal driving a 3.3V input). | (no required parameters) |
auto_fix | Automatically fix common validation issues: add missing decoupling capacitors, pull-up/pull-down resistors, and ESD protection components. | (no required parameters) |
dfm_check | Run Design for Manufacturing checks against common fabrication constraints (trace width, via size, clearances, annular ring). | (no required parameters) |
thermal_analysis | Estimate power dissipation for each component and flag potential thermal hot spots based on package type and power rating. | (no required parameters) |
generate_test_plan | Gather full project state and generate a structured test plan covering power-on, functional, and boundary tests. | (no required parameters) |
Export — 10 tools
Export — 10 tools
The export module generates industry-standard EDA files and downloads them directly in the browser. All export tools run server-side — they read project data from the database, generate file content, and return a
download_file action that triggers a browser download.| Tool | Description | Output |
|---|---|---|
export_kicad | Generate a KiCad 6 schematic file (.kicad_sch). | .kicad_sch |
export_eagle | Generate an Eagle schematic XML file (.sch). | .sch |
export_spice | Generate a SPICE netlist for simulation in LTspice or ngspice. | .sp |
export_bom_csv | Export the Bill of Materials as CSV (generic, JLCPCB, Mouser, or DigiKey format). | .csv |
export_gerber | Generate a full Gerber RS-274X package: copper layers, solder mask, silkscreen, paste mask. | .zip |
export_drill | Generate an Excellon drill file for CNC drilling. | .drl |
export_pick_place | Generate a pick-and-place (centroid) file for automated assembly. | .csv |
export_netlist | Export the circuit netlist — available in KiCad netlist format or CSV. | .net / .csv |
export_design_report | Generate a full Markdown design report covering architecture, BOM, validation, and simulation results. | .md |
export_fritzing | Generate a Fritzing project file (.fzpz) for breadboard visualization. | .fzpz |
Component — 5 tools
Component — 5 tools
The component module manages the project’s custom component library. It creates, modifies, and deletes component parts, forks components from the shared library, and runs component-level DRC.
| Tool | Description | Key parameters |
|---|---|---|
create_component | Create a new component part in the project library with full metadata. Executes server-side. | title, family (MCU, Resistor, Capacitor, etc.), manufacturer, mpn, category, description, nodeId (optional link to architecture node) |
modify_component | Update metadata fields on an existing component part. | partId or nodeId to locate the part; field updates (title, manufacturer, mpn, etc.) |
delete_component | Delete a component part from the library. Destructive — requires confirmation. | partId |
fork_library_component | Copy a component from the shared public library into your project library for customization. Dispatched client-side. | libraryComponentId |
validate_component | Run DRC on a specific component — checks for missing pin definitions, invalid package info, and incomplete metadata. | partId |
Navigation — 2 tools
Navigation — 2 tools
Project — 7 tools
Project — 7 tools
The project module handles project-level metadata, design documentation, history, and image analysis.
| Tool | Description | Key parameters |
|---|---|---|
rename_project | Rename the current project. Executes server-side; updates the projects table. | name |
update_description | Update the project description. Executes server-side. | description |
save_decision | Record a design decision with rationale in the project history. Useful for capturing trade-off reasoning. | decision, rationale |
add_annotation | Attach a sticky-note annotation to a specific architecture node. | nodeLabel, note, color |
undo | Undo the most recent design action. Equivalent to Ctrl+Z. | (no parameters) |
redo | Redo the most recently undone action. Equivalent to Ctrl+Y. | (no parameters) |
analyze_image | Analyze an uploaded image — a circuit photo, hand-drawn schematic, or component reference. Returns a description and, where possible, extracted component or connection data. | description (context about what the image shows) |
Simulation — 3 tools
Simulation — 3 tools
The simulation module interfaces with the SPICE simulation engine. It generates netlists, runs frequency analysis, and retrieves cached simulation results.
| Tool | Description | Key parameters |
|---|---|---|
generate_spice_netlist | Generate a SPICE netlist from the active circuit design. Returns the netlist text for review or export. | circuitId |
run_frequency_analysis | Run an AC/frequency analysis on a circuit. Produces gain and phase data across a configurable frequency range for Bode plot rendering. | circuitId, startFreq, stopFreq, points |
get_simulation_results | Retrieve cached simulation results for a circuit design. | circuitId |
Analysis — 4 tools
Analysis — 4 tools
The analysis module provides vision-based circuit understanding, hardware debugging, net explanation, and net name suggestions.
| Tool | Description | Key parameters |
|---|---|---|
analyze_image | Analyze an image of a circuit, PCB, or schematic using the AI’s vision capabilities. Identifies components, connections, and potential issues. | description (context), image attachment |
hardware_debug_analysis | Analyze the current circuit design for potential hardware debugging issues — floating pins, missing pull-ups, power sequencing problems, and common mistakes. | circuitId (optional) |
suggest_net_names | Suggest meaningful net names for all unnamed nets in a circuit based on the connected components and their functions. | circuitId |
explain_net | Explain the purpose and connections of a specific net — lists all connected pins, describes the signal type, and explains the electrical function. | circuitId, netId |
Firmware — 5 tools
Firmware — 5 tools
The firmware module bridges ProtoPulse to the Arduino IDE workflow. It generates sketches from design context, compiles code, uploads to connected hardware, and manages Arduino libraries and board detection.
| Tool | Description | Key parameters |
|---|---|---|
generate_arduino_sketch | Generate an Arduino sketch that matches the current design — initializes pins, configures peripherals (SPI, I2C, UART), and adds stub functions for the design’s components. | intent (description of what the firmware should do), boardType (uno, mega, esp32, etc.) |
compile_sketch | Compile the current Arduino sketch for a target board. Returns compiler output and any errors. | fqbn (Fully Qualified Board Name, e.g., arduino:avr:uno) |
upload_firmware | Upload compiled firmware to a connected board over USB. Requires Web Serial. | fqbn, port |
search_arduino_libraries | Search the Arduino Library Manager index for libraries matching a query. | query |
list_arduino_boards | List all Arduino-compatible boards currently detected on serial ports. | (no parameters) |
Destructive tools
The following tools require explicit user confirmation before executing. The chat panel will display a confirmation card; the server independently enforces the requirement and will reject any request that arrives withoutconfirmed: true.
remove_node— deletes a block diagram node and all its edgesremove_edge— deletes a connectionclear_canvas— removes all nodes and edges from the architecture diagramremove_instance— removes a placed schematic componentremove_net— deletes a net and its wire segmentsremove_bom_item— removes a BOM line itemclear_issues— clears all validation findingsdelete_component— deletes a component from the library