The Output view gives you access to every file your design needs for manufacturing, hand-off, and documentation. ProtoPulse generates over 14 distinct export formats covering the full journey from schematic review to PCB fabrication and firmware bring-up, all from the same design data.Documentation Index
Fetch the complete documentation index at: https://mintlify.com/wtyler2505/ProtoPulse/llms.txt
Use this file to discover all available pages before exploring further.
Overview of the Output view
Open the Output view by clicking Exports in the main tab bar. Export formats are organised into four categories:- Schematic & Netlist — EDA tool formats and connectivity data
- PCB Fabrication — manufacturing files for PCB production and assembly
- Documentation & BOM — reports, bill of materials, and third-party formats
- Firmware — generated starter code for your microcontroller
Full list of export formats
Schematic & Netlist
| Format | File extension | Description | Use case |
|---|---|---|---|
| KiCad Project | .kicad_sch / .kicad_pcb / .kicad_pro | Full KiCad project bundle — schematic, PCB layout, and project file | Import into KiCad 7/8 for advanced PCB design |
| Eagle Project | .sch / .brd (XML) | Autodesk Eagle schematic and board files | Import into Eagle or Fusion 360 Electronics |
| SPICE Netlist | .cir | Circuit simulation netlist in standard SPICE format | Load into LTspice, ngspice, or any SPICE simulator |
| KiCad Netlist | .net | Connectivity netlist in KiCad S-expression format | Back-annotate to KiCad or feed into third-party tools |
| CSV Netlist | .csv | Flat connectivity netlist listing all net-to-pin connections | Custom tooling, spreadsheet analysis, ECO comparison |
PCB fabrication
| Format | File extension | Description | Use case |
|---|---|---|---|
| Gerber files | .gbr (RS-274X) | Copper layers (F.Cu, B.Cu), solder mask (F.Mask, B.Mask), silkscreen (F.Silk, B.Silk), solder paste (F.Paste, B.Paste) | Send to JLCPCB, PCBWay, OSHPark, or any fab |
| Excellon drill files | .drl | Through-hole and via drill positions and sizes | Required alongside Gerbers for PCB fabrication |
| Pick-and-place | .csv | SMT assembly centroid file with X/Y coordinates and rotation for each component | Upload to JLCPCB SMT assembly, pick-and-place machines |
Documentation & BOM
| Format | File extension | Description | Use case |
|---|---|---|---|
| BOM CSV | .csv | Bill of materials with part numbers, quantities, manufacturers, suppliers, and pricing | Procurement, Excel/Google Sheets, ERP import |
| Design Report (PDF) | .pdf | Comprehensive design report with architecture overview, BOM, validation summary, and circuit sheets | Client hand-off, design review, project archiving |
| FMEA Report | .csv | Failure Mode and Effects Analysis with risk priority numbers (RPN) for each component | Risk analysis, safety-critical design reviews |
| PDF Schematic | .pdf | Schematic sheets exported as a printable PDF | Design reviews, documentation, sharing |
| Fritzing Project | .fzz | Full Fritzing project archive | Educational use, Fritzing-based documentation |
Firmware
| Format | File extension | Description | Use case |
|---|---|---|---|
| Firmware Scaffold | .cpp / .h / .ini | Arduino/PlatformIO starter code generated from your architecture — includes pin definitions, peripheral initialisation, and build config | Jump-start firmware development for your exact hardware |
How to trigger an export
Select a format
Browse the category cards and locate the format you want. Each card shows the format name, file extension, and a brief description.
Download
Click the Download button on the card. ProtoPulse sends a request to the server, generates the file, and triggers a browser download.
- “Export to KiCad”
- “Generate a SPICE netlist”
- “Export the BOM as CSV”
- “Create a firmware scaffold for this design”
- “Export Gerbers”
DRC gate — validation before export
Before generating certain export formats, ProtoPulse runs a lightweight DRC gate to catch critical errors that would produce invalid or unsafe manufacturing files. If the DRC gate finds blocking issues, the export is halted and the issues are listed so you can fix them first. The DRC gate is implemented inserver/export/drc-gate.ts and checks for the most severe error classes: shorted power nets, trace widths below an absolute minimum, and missing required fields (such as an undefined drill diameter in a THT pad).
To fix DRC gate failures, open the Validation view, resolve the listed errors, and then retry the export.
Not every format requires a complete schematic. BOM CSV, Design Report, and FMEA Report can be exported from a design that has only an architecture block diagram and a BOM — no schematic instances or nets are required. Formats that depend on schematic data (KiCad, Eagle, SPICE Netlist, Gerbers, Drill Files, Pick-and-Place, Firmware Scaffold) require a circuit design with placed component instances and connected nets.
Design Validation
Run DRC and ERC before exporting to avoid failures at the DRC gate.
SPICE Simulation
Generate and run SPICE netlists for circuit analysis before manufacturing.
BOM Management
Manage and export your bill of materials from the Procurement view.
AI Tool Actions Reference
Full reference for the 10 AI export tools — KiCad, Gerber, SPICE, and more.