PCB Layout

The PCB editor (Pcbnew) transforms your schematic design into a physical printed circuit board layout. It handles component placement, routing, copper pours, and design rule checking.

Overview

PCB layout in KiCad is centered around the BOARD class (source/pcbnew/board.h:25), which contains all physical design data including footprints, tracks, zones, and layer stackup.

2-Layer Boards

Standard two-sided PCBs for simple designs

Multi-Layer

4+ layer boards for complex, high-density designs

Board Structure

BOARD Class

The main board container manages all PCB elements:

// Source: pcbnew/board.h:25
class BOARD : public BOARD_ITEM_CONTAINER, public EMBEDDED_FILES
{
    BOARD_DESIGN_SETTINGS m_designSettings;  // Constraints and rules
    CONNECTIVITY_DATA* m_connectivity;       // Net connectivity
    BOARD_STACKUP m_stackup;                // Layer configuration
    std::vector<FOOTPRINT*> m_footprints;   // Component footprints
    TRACKS m_tracks;                        // Copper tracks
    std::vector<ZONE*> m_zones;             // Copper pours
};

Board Items

Footprints
Tracks
Zones
Graphics

Physical component packages placed on the board:

// Source: pcbnew/footprint.h:25
class FOOTPRINT : public BOARD_ITEM_CONTAINER, public EMBEDDED_FILES
{
    std::vector<PAD*> m_pads;           // Component pads
    std::vector<FP_3DMODEL> m_3D_Drawings;  // 3D models
    VECTOR2I m_pos;                     // Position on board
    EDA_ANGLE m_orient;                 // Rotation angle
};

PCB Design Workflow

Import Netlist

Transfer schematic connectivity to the PCB:

Update PCB from schematic (F8 in schematic editor)
Load component associations
Import net information
Assign footprints to symbols

Modern KiCad uses direct synchronization rather than separate netlist files. Changes in the schematic are pushed directly to the PCB.

Define Board Outline

Draw the physical board edge on the Edge.Cuts layer:

Use lines, arcs, and circles
Ensure closed, continuous outline
Add mounting holes and cutouts
Set board thickness in stackup manager

Place Footprints

Position components on the board:

void SetPosition( const VECTOR2I& aPos );
void SetOrientation( const EDA_ANGLE& aAngle );
void Flip( const VECTOR2I& aCentre, bool aFlipLeftRight );

Placement strategies:

Group by functional block
Minimize trace lengths for critical nets
Consider thermal management
Allow room for routing channels

Route Traces

Connect pads according to the netlist:Interactive Router (default):

Push and shove routing
Automatic via placement
Differential pair routing
Length matching

Manual Routing:

Direct track placement
Full control over path
Custom via placement

Add Copper Pours

Create filled zones for ground/power planes:

Define zone outline
Set net assignment
Configure clearances
Set thermal relief pattern
Adjust fill settings (solid/hatched)

Run Design Rule Check

Validate the layout against design rules:

// Source: pcbnew/drc/drc_engine.h:131
class DRC_ENGINE : public UNITS_PROVIDER
{
    void RunTests( PROGRESS_REPORTER* aProgressReporter );
    std::vector<std::shared_ptr<DRC_ITEM>> GetViolations();
};

Layer Management

Standard Layers

Copper Layers

F.Cu / B.Cu: Front and back copper
In1.Cu - In30.Cu: Internal copper layers
Configurable count (2, 4, 6, 8, etc.)

Technical Layers

F.Adhes / B.Adhes: Adhesive application
F.Paste / B.Paste: Solder paste stencils
F.SilkS / B.SilkS: Silkscreen printing
F.Mask / B.Mask: Solder mask
Edge.Cuts: Board outline

User Layers

Dwgs.User: Documentation drawings
Cmts.User: Comments and notes
Eco1.User / Eco2.User: Engineering change orders
User.1 - User.9: Custom purposes

Layer Stackup

Define board construction in the stackup manager:

// Source: pcbnew/board_stackup_manager/board_stackup.h
class BOARD_STACKUP
{
    std::vector<BOARD_STACKUP_ITEM*> m_list;
    // Defines:
    // - Copper thickness
    // - Dielectric material and thickness  
    // - Solder mask and silkscreen
};

Connectivity

The connectivity engine manages net assignments:

class CONNECTIVITY_DATA
{
    // Tracks which pads/tracks belong to which nets
    // Updates when items are added/moved/deleted
    // Provides net-aware selection and highlighting
};

Use the connectivity inspector to troubleshoot net issues. It shows all items connected to a selected net.

Board Commit System

Changes are tracked through the commit system:

// Source: pcbnew/board_commit.h
class BOARD_COMMIT
{
    void Add( BOARD_ITEM* aItem );
    void Remove( BOARD_ITEM* aItem );
    void Modify( BOARD_ITEM* aItem );
    void Push( const wxString& aMessage );  // Commit with undo point
};

Routing Features

Differential Pairs

Route paired signals (USB, LVDS, etc.) with matched lengths:

Automatic pair recognition
Coupled spacing control
Length tuning tools
Skew management

Length Matching

Match trace lengths for timing-critical nets:

Meander/serpentine generation
Length measurement
Target length specification
Visual length display

Via Types

Through

Drilled through entire board

Blind

From outer to internal layer

Buried

Between internal layers only

3D Visualization

View the board in 3D to check component placement and mechanical fit:

// Source: pcbnew/footprint.h:107
struct FP_3DMODEL
{
    wxString m_Filename;      // 3D model path
    VECTOR3D m_Scale;         // Scaling factors
    VECTOR3D m_Rotation;      // Rotation (degrees)
    VECTOR3D m_Offset;        // Position offset
    double   m_Opacity;       // Transparency
    bool     m_Show;          // Visibility flag
};

Footprints can reference multiple 3D models. The 3D viewer combines them to show the complete board assembly.

Board Statistics

Generate board reports:

// Source: pcbnew/board_statistics.h
class BOARD_STATISTICS
{
    int m_footprintCount;
    int m_padCount;
    int m_viaCount;
    int m_trackLength;        // Total trace length
    std::map<int, int> m_layerItemCounts;
};

Footprint Attributes

Components have manufacturing attributes:

// Source: pcbnew/footprint.h:82
enum FOOTPRINT_ATTR_T
{
    FP_THROUGH_HOLE             = 0x0001,  // THT component
    FP_SMD                      = 0x0002,  // SMT component
    FP_EXCLUDE_FROM_POS_FILES   = 0x0004,  // Omit from pick-and-place
    FP_EXCLUDE_FROM_BOM         = 0x0008,  // Omit from BOM
    FP_BOARD_ONLY               = 0x0010,  // No schematic symbol
    FP_DNP                      = 0x0040   // Do not place
};

Best Practices

Component Placement

Place connectors at board edges
Group related components together
Orient ICs in same direction for easier debugging
Keep high-speed components close together
Consider assembly and testing access

Routing Strategy

Route critical nets first (clocks, high-speed signals)
Use ground planes for return paths
Avoid routing under noisy components
Minimize via count on high-speed signals
Maintain controlled impedance on matched nets

Copper Pours

Use solid ground planes on inner layers
Stitch planes with vias for low impedance
Avoid isolated copper islands
Set appropriate thermal reliefs for hand soldering

Silkscreen

Add reference designators on assembly layer
Include polarity marks and pin 1 indicators
Add revision and date information
Ensure text is readable (minimum 0.8mm height)
Don’t place text over pads or vias

Source Code References

// Main PCB board container
// Location: source/pcbnew/board.h:25
class BOARD : public BOARD_ITEM_CONTAINER

// Component footprint definition
// Location: source/pcbnew/footprint.h:25
class FOOTPRINT : public BOARD_ITEM_CONTAINER

// Design rule checking engine
// Location: source/pcbnew/drc/drc_engine.h:131
class DRC_ENGINE : public UNITS_PROVIDER

Next Steps

Design Rules

Configure constraints and DRC

3D Models

Add 3D visualization

Manufacturing Output

Generate production files

Footprint Libraries

Manage PCB footprints

Getting Started

Core Applications

Design Workflow

Advanced Features

Overview

2-Layer Boards

Multi-Layer

Board Structure

BOARD Class

Board Items

PCB Design Workflow

Layer Management

Standard Layers

Layer Stackup

Connectivity

Board Commit System

Routing Features

Differential Pairs

Length Matching

Via Types

Through

Blind

Buried

3D Visualization

Board Statistics

Footprint Attributes

Best Practices

Source Code References

Next Steps

Design Rules

3D Models

Manufacturing Output

Footprint Libraries

​Overview

2-Layer Boards

Multi-Layer

​Board Structure

​BOARD Class

​Board Items

​PCB Design Workflow

​Layer Management

​Standard Layers

​Layer Stackup

​Connectivity

​Board Commit System

​Routing Features

​Differential Pairs

​Length Matching

​Via Types

Through

Blind

Buried

​3D Visualization

​Board Statistics

​Footprint Attributes

​Best Practices

​Source Code References

​Next Steps

Design Rules

3D Models

Manufacturing Output

Footprint Libraries

Overview

Board Structure

BOARD Class

Board Items

PCB Design Workflow

Layer Management

Standard Layers

Layer Stackup

Connectivity

Board Commit System

Routing Features

Differential Pairs

Length Matching

Via Types

3D Visualization

Board Statistics

Footprint Attributes

Best Practices

Source Code References

Next Steps